Integrated circuits (ICs) have played a major role in the miniaturization of electronic circuits and devices incorporating such circuits. ICs generally constitute a combination of multiple active elements (e.g., transistors) and passive elements (e.g., resistors and capacitors) integrated on a semiconductor substrate. In recent years, the integration of ever higher numbers of active and passive elements (both hereinafter referred to simply as "elements") has permitted increased functionality, decreased power consumption, and improved processing speeds of such circuits.
The technology for forming integrated-circuit patterns on semiconductor substrates has advanced rapidly, resulting in a capability of manufacturing progressively smaller elements and other feature sizes. However, reduction in feature size alone does not permit the highest degree of circuit integration. Large semiconductor substrate-surface areas are required to integrate some complex circuit structures and hence device "chip" (i.e., die) sizes have increased as well.
Image-pickup devices (e.g., charge-coupled devices) represent an important example of devices requiring a large chip size, which poses interesting technical challenges. Image-pickup devices for broadcasting television according to the well-established National Television System Committee (NTSC) television format need to sense about 400,000 image points (pixels) in order to allow transmission of an adequate image. A charge-coupled device (CCD) for this application offering the same image quality should have at least the same number (400,000) of light-sensitive elements, each such light-sensitive element termed herein a "pixel". However, broadcast television according to newer High Definition Television (HDTV) standards require an image-pickup device having at least approximately 2,000,000 pixels. It is readily apparent that, in order to accommodate such an increased number of pixels, a CCD for HDTV use will likely require a larger "die" than a CCD for NTSC use, wherein a "die" represents an area occupied by the entire device (i.e., by all the pixels and auxiliary integrated circuitry of the device).
An important process used in manufacturing semiconductor devices is photolithography. In photolithography, a reticle defines a circuit pattern to be projection-transferred to the surface of a sensitized substrate. The circuit pattern on the reticle usually corresponds to an entire die, and the area on the reticle occupied by a pattern for one die is termed a "field". The substrate is "sensitized" usually by applying, before the projection exposure, a layer of a photoresist. The substrate is usually a semiconductor material such as a silicon "wafer". After exposure of the resist layer, usually with multiple dies placed side by side, the wafer is further processed to complete manufacture of the devices on the wafer.
Photolithography is normally performed using a projection-exposure apparatus using ultraviolet or other suitable radiation generated by a radiation source. The radiation is passed through the reticle and refracted so as to form the reticle pattern on the semiconductor. As shown in FIG. 9, the maximum exposure area 10 that an exposure apparatus can irradiate is generally limited relative to the area of the die 11 on the reticle. When making a large semiconductor device such as an HDTV image-pickup device, the size of the die 11 may exceed the size of the maximum area 10 of exposure. In such an instance, the die 11 is divided into multiple "subfields" that are sequentially projection-exposed onto the substrate surface in an ordered way to produce the corresponding die on the surface of the substrate. In such an instance, multiple subfields on the reticle are required for each die layer formed on the substrate.
By way of example, FIG. 10 shows a general profile, on a reticle, of an entire field 18 (corresponding to a die) for an HDTV image-pickup device. The field 18 is divided into two reticle subfields 19a, 19b to be sequentially projected onto a sensitive substrate (i.e., two sequential exposures are required to reproduce the entire field 18 on the substrate surface). As is generally known in the art, an HDTV image-pickup device comprises an array of many pixels (too many to show) arranged in a light-sensitive area 20. Each pixel includes a light-sensitive element, an associated storage element for storing charge generated by exposure of the light-sensitive element to incident light, and a conversion element for converting the stored charge to an electrical signal. The device also includes a horizontal scanning circuit 21 and vertical scanning circuits 22, 23 operable to sequentially select pixels for readout. The device further includes a combined reset, constant-current, and bias circuit 24 in communication with the pixels. All these circuits and elements are defined within the area of the field.
Further with respect to FIG. 10, the field 18 is divided along a boundary line H-H' into two subfields 19a, 19b. To reproduce the complete die on the substrate, the subfields 19a, 19b are sequentially exposed onto corresponding separate but contiguous regions on the substrate surface. When performing multiple exposures in this way to reproduce a die pattern, the subfield exposures must accurately align with each other on the substrate surface. This is especially important with respect to interconnections between subfields that span the boundary line H-H' in FIG. 10.
Unfortunately, some alignment errors inevitably arise between adjacent subfield patterns on the substrate surface. Various ways have been devised to alleviate the effects of this problem. For example, as shown in FIG. 11(a), an alignment-error-compensation feature 32 can be provided on each trace 30, 31 at the point where the respective trace 30, 31 crosses the boundary line between adjacent subfields on the reticle. The feature 32 is typically wider by 2W than the corresponding trace 30, 31. The extra width 2W of the feature 32 helps compensate for misalignment by providing an overlap length L. After exposure onto the substrate, adjacent features 32 overlap each other as shown in FIG. 11(b).
Alignment-error-compensation features 32 also prevent narrowing of the corresponding traces on the substrate as the traces span the subfield boundary. Absent the features 32, a trace exhibiting such narrowing can exhibit an undesirable increase in electrical resistance. Narrowing can arise, for example, due to a double exposure that can occur on the substrate along boundaries between adjacent subfields of a die.
During exposure of a substrate, reticle subfields are preferably arranged so that misalignments on the substrate are 0.1 .mu.m or less. Thus, the L and W dimensions of the alignment-error-compensation features are generally between 0.1 .mu.m and 0.3 .mu.m.
In the prior art, projection-exposure apparatus and methods utilize reticles on which the boundaries between subfields are straight lines. FIG. 12 shows a portion of an IC device defined in part by such a reticle. The device comprises MOS-FETs 50'-57' and interconnections 70'-79'. A boundary between adjacent subfields 60a, 60b is designated by the line A-A'. It is not possible to form circuit elements across the actual boundary A-A'. This restricts circuit layout and limits further device miniaturization.